A photo mask used in the production process of a semiconductor device is structured as a glass substrate formed with a light shielding film. The lithography process of a semiconductor device is carried out by projecting and exposing this photo mask onto a wafer.
In the photo mask used in the lithography process, it is necessary to convert designed CAD data to data for the lithography system and faithfully pattern this on the light shielding film on the glass substrate.
Further, even if the patterning of the photo mask is correct, occurrence of pattern deterioration on the wafer referred to as the “optical proximity effect” at the time of exposure becomes a problem.
This is a phenomenon where a stepper beam passing through an opened mask pattern shape is diffracted or interfered with and as a result is not correctly resolved on the wafer surface.
As one of the optical proximity effects, there is the self optical proximity effect wherein the stepper beam is diffracted at its own pattern and as a result the finished dimensions of the pattern resolved on the wafer end up becoming different or, in a rectangular pattern, the precision of the finished dimensions ends up greatly differing at both the short sides and the long sides. Further, there is a mutual optical proximity effect where there is interference with a stepper beam diffracted from another pattern and, as a result, the finished dimensions on the wafer end up becoming different.
In this way, in the photolithography process in the production process of a semiconductor device, the dimensional error between design patterns and actual resist patterns occurring due to the optical proximity effect becomes a problem.
In the past, in optical proximity effect correction masks used to deal with this, first, a mask dimension correction value minimizing the pattern dimensional error with respect to a design pattern was determined by shape simulation or results of exposure experiments. Then, this correction value was used to correct the dimensions of the design pattern and that data used for a mask EB lithography system.
Up to today, for a purpose of faithful reproduction according to the design patterns, a variety of optical proximity effect correction techniques have been developed.
In the production of the increasingly miniaturized semiconductor devices in recent years, however, it is very difficult to obtain a perfect resist pattern corresponding to the design pattern by an optical proximity effect correction technique. Some deviation from the design pattern occurs.
In this case, if it is intended to correct the patterns so that all of the patterns become as designed, an enormous time would be required.
Here, for example, in a MOS integrated circuit, the highest line width controllability is required when processing the gate electrodes.
The gate pattern width of a transistor, i.e., what is generally called the “gate length”, determines the gate threshold voltage, mutual conductance, and other transistor characteristics. Accordingly, since variation in the line width of the gate length directly affects variation in characteristics, control of the line width of a gate electrode pattern is most important in formation of a MOS transistor.
In this case as well, like in the past, correction for faithfully reproducing all of the gate electrode patterns corresponding to the design patterns is very difficult in practice due in part also to the fact that the line width of a gate electrode pattern is particularly fine. Further, there is a problem in that the correction time of the patterns becomes enormous.
As described above, in the past, it was attempted to faithfully reproduce all patterns according to the design patterns. It would be useful if it were possible to correct patterns in a practical range according to the required circuit characteristics at mainly portions functionally related with the device characteristics.